1. Field of the Invention
The present invention relates to a semiconductor integrated circuit provided with bonding pads or fuses for switching an internal circuit to any desired mode of a plurality of previously set operation modes.
2. Description of the Prior Art
Recently, semiconductor integrated circuits (referred to as ICs, hereinafter) having bonding pads or fuses for switching the internal circuit have been developed in order to realize a plurality of modes by a single chip. FIG. 1 is a plane view showing an IC and bonding pads as described above. In FIG. 1, bonding pads 121 to 140 formed on a chip 100 disposed in a lead frame are electrically connected to respective pins 101 to 120 of the lead frame via wires 141 to 160. Here, the pin 101 is a voltage supply pin, and the pads 161 to 163 are those for switching the operation modes of the circuit. Therefore, it is possible to set any desired operation mode by connecting the voltage supply pin 101 to any one of the switching pads 161, 162 and 163.
FIG. 2 is a circuit diagram showing an example of the operation switching circuit provided in an IC in order to switch the IC operation modes. The operation switching circuit 1 is composed of high resistance N channel transistors Ta, Tb and Tc; and inverters 6a1 and 6a2, 6b1 and 6b2, and 6c1 and 6c2. Operation mode switching pads Pa, Pb and Pc are connected to the input terminals of the corresponding inverters 6a1, 6b1 and 6c1 via nodes 4a, 4b and 4c, respectively. Further, the output terminals of the inverters 6a1, 6b1 and 6c1 are connected to the input terminals of the inverters 6a2, 6b2 and 6c2, respectively.
The drains of the transistors Ta, Tb and Tc are connected to the nodes 4a, 4b and 4c, respectively; the sources of the same transistors are connected to a predetermined supply voltage, respectively; and a supply voltage Vcc is applied to the gates thereof, respectively. The pads Pa, Pb and Pc are ordinarily held at the ground potential by the transistors Ta, Tb and Tc, respectively. The potentials at these pads are transmitted to nodes 8a, 8b and 8c via corresponding two-stage inverters 6, respectively. The nodes 8a, 8b and 8c are connected to additional operation circuits 70a, 70b and 70c, respectively. These additional operation circuits are connected to a basic circuit 80 via nodes 75a, 75b and 75c, respectively.
The additional operation circuits 70a, 70b and 70c are formed in the IC so as to function in different operation modes, respectively. As described in more detail later, whenever any one of the additional operation circuits 70 is selected, it is possible to activate the IC in any desired mode in cooperation with the selected additional operation circuit 70 and the basic circuit 80 including any other essential circuits (e.g., a clock oscillator, etc.).
In operation, when the potentials at the nodes 4a, 4b and 4c are at the ground level, the additional operation circuits 70 connected to the corresponding nodes are deactivated, so that the basic circuit 80 is not subjected to the influence of the additional operation circuits 70.
Here, when the supply voltage Vcc is given to the pad Pa via a wire connection, for instance, since the resistance of the transistor Ta is high, the potential at the node 4a rises to the supply voltage Vcc. This potential at the node 4a is transmitted to the node 8a via the inverters 6a1 and 6a2 to activate the additional operation circuit 70a. Accordingly, the basic circuit 80 is affected by the additional operation circuit 70a, thus any desired operation mode of the IC being selectable.
In the prior art semiconductor integrated circuit as described above, however, since the respective additional operation circuits 70a, 70b and 70c are provided so as to function in complementary operation modes, when the supply voltage is erroneously applied to two or more pads of the three pads Pa, Pb and Pc simultaneously, the additional operation circuits 70 corresponding to these pads P are activated simultaneously and thereby the basic circuit 80 is affected by these additional operation circuits 70, with the result that it is impossible to obtain any desired characteristics. Where this status occurs during the manufacturing process, the product is determined to be defective. Further, this status cannot be detected by the ordinary test according to the combinations of the plural operation modes selected. In other words, since abnormal operation occurs only in a specific combination, there exists a problem in that the reliability of the IC is deteriorated or an accident may occur.
As described above, in the prior art semiconductor integrated circuit provided with bonding pads or fuses for selecting or switching the operation modes of the circuit, since the circuits corresponding to the respective plural operation modes are often independent from each other, although erroneous bonding can be detected at specific operation timings, the ordinary test cannot detect the erroneous bonding, thus raising a problem in that manufacturing control is difficult to perform.